Contemporary Logic Design, 2nd edition

Published by Pearson (December 15, 2004) © 2005

  • Randy H. Katz University of California, Berkeley
$234.66

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BASIC APPROACH

In the past ten years there has been a revolution in the practice of hardware design. Professionals now rely on CAD software, rapid prototyping, and programmable logic devices to streamline the design process. Contemporary Logic Design is the first text to address these changes – and to offer a truly modern introduction to logic design. Throughout, the author complements his presentation of logic design theory with discussions of current design technologies. Approximately 60% of the book presents new material; the remainder has been re-organized and partially re-written to correspond to the organizational changes.  

FEATURES

 

• Comprehensive coverage of programmable logic, including ROMs, PALs, and PLAs.

     

• Introduction to a wide range of software tools (including schematic capture, logic simulation and Boolean minimization) – Demonstrates how they fit into the hardware design process.

• Hands-on experimentation using software tools such as Aldec– Bolsters students’ understanding of practical design methods.

 

 

 

• New introduction – Now introduces the concepts of computation, encoding, sequencing, and instruction interpretation.

– Sets a better road map to the rest of the book and provide a rationale for its organization.  

– Includes many more case studies to help students see the design process in action, rather than discussing the design process in the abstract.

 

• Re-partitioning of material on combinational and sequential logic – the two major sections on combinational and sequential logic has been divided into a set of chapters.  They first cover fundamental concepts, then describe the principles of manipulating the logic into different forms, followed by a discussion of the optimizations and tools that are available, and conclude with the technologies available to build logic circuits.  

– Each  is capped by a set of comprehensive design case studies.

 

• More Emphasis on Programmable Logic.  

– New material on the latest programmable logic technologies for realizing digital designs with a focus on the underlying concepts.

  

• Hardware description languages – Given a more central role to reflect their total acceptance by the design community over the past 10 years.  

– Describes only the basics of one of the dominant languages (Verilog), discussing behavior as well as covering the basics of HDL simulation models.  

– Highlights the power of the languages in making designs more parameterizable and customizable and designers more efficient.

 

• New design case studies – Provides a large collection of examples where the intuitions and rules-of-thumb are discussed explicitly.  

– Many new and extensive design case studies  found throughout the text and in two large chapters (5& 10) focus on combinational and sequential logic.

 

Offers computer organization materials compatible with the text on a website.

1. Introduction

1.1 Dissecting the Title

1.2 A Brief History of Logic Design

1.3 Computation

1.4 Examples

 

2. Combinational Logic

2.1 Outputs as a Function of Inputs

2.2 Laws and Theorems of Boolean Logic

2.3 Realizing Boolean Formulas

2.4 Two-Level Logic

2.5 Motivation for Two-Level Simplification

2.6 Multi-level Logic

2.7 Motivation for Multi-Level Minimization

 

3. Working with Combinational Logic

3.1 Two-Level Simplification

3.2 Automating Two-level Simplification

3.3 Multi-level Simplification

3.4 Automating Multi-level Simplification

3.5 Time Response in Combinational Networks

3.6 Hardware Description Languages

 

4. Combinational Logic Technologies

4.1 History

4.2 Basic Logic Components

4.3 Two-Level and Multi-Level Logic

4.4 Non-gate Logic  

 

5. Case Studies in Combinational Logic Design

5.1 Design Procedure

5.2 A Simple Process Line Control Problem

5.3 Telephone Keypad Decoder

5.4 Leap Year Calculation

5.5 Logic Function Unit   

5.6 Adder Design

5.7 Arithmetic Logic Unit Design

5.8 Combinational Multiplier      

 

6. Sequential Logic

6.1 Sequential Logic Elements

6.2 Timing Methodologies

6.3 Registers       

 

7. Finite State Machines

7.1 Counters       

7.2 The Concept of the State Machine

7.3 Basic Design Approach

7.4 Motivation for Optimization   

 

8. Working with Finite State Machines

8.1 State Minimization/Reduction  

8.2 State Assignment

8.3 Finite State Machine Partitioning   

8.4 Hardware Description Languages

 

9. Sequential Logic Technologies

9.1 Basic Sequential Logic Components

9.2 FSM Design with Counters

9.3 FSM Design with Programmable Logic

9.4 FSM Design with More Sophisticated Programmable Logic

9.5 Case Study: Traffic Light Controller

 

10. Case Studies in Sequential Logic Design

10.1 A Finite String Recognizer     

10.2 A Complex Counter  

10.3 A Digital Combination Lock  

10.4 A Memory Controller

10.5 A Sequential Multiplier

10.6 A Serial Line Transmitter/Receiver

 

11. Computer Organization

11.1 Structure of a Computer

11.2 Busing Strategies     

11.3 Finite State Machines for Simple CPUs  

 

12. Controller Implementation

12.1 Random Logic

12.2 Time State (Divide and Conquer)

12.3 Jump Counter

12.4 Branch Sequencers

12.5 Microprogramming

 

Epilogue

 

 

Randy Katz received his undergraduate degree from Cornell University, and his M.S. and Ph.D. degrees from the University of California, Berkeley. He joined the faculty at Berkeley in 1983, where he is now the United Microelectronics Corporation Distinguished Professor in Electrical Engineering and Computer Science. He is a Fellow of the ACM and the IEEE, and a member of the National Academy of Engineering and the American Academy of Arts and Sciences. He has published over 230 refereed technical papers, book chapters, and books. He has won numerous awards, including 12 best paper awards, one "test of time" paper award, three best presentation awards, the Outstanding Alumni Award of the Computer Science Division, the CRA Outstanding Service Award, the Berkeley Distinguished Teaching Award, the Air Force Exceptional Civilian Service Decoration, The IEEE Reynolds Johnson Information Storage Award, the ASEE Frederic E. Terman Award, and the ACM Karl V. Karlstrom Outstanding Educator Award. With colleagues at Berkeley, he developed the terminology of and early prototypes for Redundant Arrays of Inexpensive Disks (RAID;. While on leave for government service in 1993-1994, he established whitehouse.gov and connected the White House to the Internet.

Gaetano Borriello is a Professor of Computer Science & Engineering at the University of Washington in Seattle. He received his undergraduate degree from the Polytechnic University, his M.S. degree from Stanford University, and his Ph.D. degree from the University of California, Berkeley. Prior to Berkeley he was a member of the research staff at Xerox's Palo Alto Research Center, where he was one of the designers of the first single-chip integrated Ethernet controller. He joined the faculty at UW in 1988 and received a Distinguished Teaching Award for his contributions in establishing the Computer Engineering undergraduate degree program. His research interests are in the design of ubiquitous computing technologies, the design of the embedded systems that connect the physical and virtual worlds, in the use of wireless sensors to infer human activities, and in creating applications that automatically adapt to their user's context. He is the founding director of Intel Research Seattle, a research laboratory focusing on new technologies and usage models for ubiquitous computing.

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