1. Introduction
1.1 Dissecting the Title
1.2 A Brief History of Logic Design
1.3 Computation
1.4 Examples
2. Combinational Logic
2.1 Outputs as a Function of Inputs
2.2 Laws and Theorems of Boolean Logic
2.3 Realizing Boolean Formulas
2.4 Two-Level Logic
2.5 Motivation for Two-Level Simplification
2.6 Multi-level Logic
2.7 Motivation for Multi-Level Minimization
3. Working with Combinational Logic
3.1 Two-Level Simplification
3.2 Automating Two-level Simplification
3.3 Multi-level Simplification
3.4 Automating Multi-level Simplification
3.5 Time Response in Combinational Networks
3.6 Hardware Description Languages
4. Combinational Logic Technologies
4.1 History
4.2 Basic Logic Components
4.3 Two-Level and Multi-Level Logic
4.4 Non-gate Logic
5. Case Studies in Combinational Logic Design
5.1 Design Procedure
5.2 A Simple Process Line Control Problem
5.3 Telephone Keypad Decoder
5.4 Leap Year Calculation
5.5 Logic Function Unit
5.6 Adder Design
5.7 Arithmetic Logic Unit Design
5.8 Combinational Multiplier
6. Sequential Logic
6.1 Sequential Logic Elements
6.2 Timing Methodologies
6.3 Registers
7. Finite State Machines
7.1 Counters
7.2 The Concept of the State Machine
7.3 Basic Design Approach
7.4 Motivation for Optimization
8. Working with Finite State Machines
8.1 State Minimization/Reduction
8.2 State Assignment
8.3 Finite State Machine Partitioning
8.4 Hardware Description Languages
9. Sequential Logic Technologies
9.1 Basic Sequential Logic Components
9.2 FSM Design with Counters
9.3 FSM Design with Programmable Logic
9.4 FSM Design with More Sophisticated Programmable Logic
9.5 Case Study: Traffic Light Controller
10. Case Studies in Sequential Logic Design
10.1 A Finite String Recognizer
10.2 A Complex Counter
10.3 A Digital Combination Lock
10.4 A Memory Controller
10.5 A Sequential Multiplier
10.6 A Serial Line Transmitter/Receiver
11. Computer Organization
11.1 Structure of a Computer
11.2 Busing Strategies
11.3 Finite State Machines for Simple CPUs
12. Controller Implementation
12.1 Random Logic
12.2 Time State (Divide and Conquer)
12.3 Jump Counter
12.4 Branch Sequencers
12.5 Microprogramming
Epilogue
